The present invention relates to programmable logic devices (PLDs), and more particularly to techniques for preventing the unauthorized modification of programmed data, such as data defining the architecture of PLDs.
PLDs provide a flexible logic architecture, userprogrammed through on-circuit fuses or switches, to perform specific functions for a given application. PLDs can be purchased "off the shelf" like standard logic gates, but can be custom tailored like gate arrays. The PLD typically includes thousands of the fuses or switches, arranged in one or more matrices known as AND or OR arrays to facilitate their manufacture and programming. To use conventional PLDs, system designers typically draft equations describing how the hardware is to perform, and enter the equations into a PLD programming machine. The unprogrammed PLDs are inserted into the machine, which interprets the equations and provides appropriate signals to the device to blow the appropriate fuses or set the appropriate switches such that the PLD will perform the desired logic function in the user's system.
It is known to employ security fuse circuits in bipolar PLDs and MOS EPROM PLDs to prevent interrogation of the data programmed into the device AND array. Bipolar devices employ fused links as the switch elements, and may not be erased once blown. The cells of PLDs using cells erasable by UV light may be erased, but this also erases the security fuse.
A PLD employing electrically erasable cells which is capable of being configured (and reconfigured) to a plurality of specific logic devices by means of programmable array and architecture data is described in pending application, Ser. No. 707,662, entitled Improved Programmable Logic Device" and having a common assignee with the present invention. Thus, the device can take the place of many other PLDs as a result of its versatility.
The referenced patent application entitled "Programmable Data Security Circuit for Programmable Logic Device," describes a security circuit which allows the device manufacturer of a reprogrammable logic device, e.g., one employing electrically erasable cells, to program the device to a particular logic architecture, and which thereafter prevents the user from modifying the protected data, which may be the architectural data and hence prevents the user from reconfiguring the device architecture. For some applications, it would be desirable to provide a reprogrammable PLD with a security device allowing the user to program the device architecture a single time if the security fuse has been set by the manufacturer or to repeatedly reconfigure the device architecture or other protected data if the fuse has not been set by the manufacturer.
It would therefore represent an advance in the art to provide a programmable architecture security fuse circuit for a reconfigurable PLD which may be set after device fabrication, and thereafter allows the user to program the logic configuration a single time, thereafter defeating any further attempts to modify the device architecture.
It would further be advantageous to provide a one time programmable architecture data security circuit for a PLD which allows the user of the PLD to program the architecture data, but thereafter defeats any attempts to alter the protected data, if the security circuit has been enabled during device fabrication, and otherwise allows the user to repeatedly reprogram the data.